Scan-Based Testing of Post-Bond Silicon Interposer Interconnects in 2.5-D ICs
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Year
: 2014DOI: 10.1109/TCAD.2014.2331336
Keyword(s): boundary scan testing,circuit simulation,elemental semiconductors,fault diagnosis,integrated circuit interconnections,integrated circuit modelling,integrated circuit testing,silicon,2.5-D ICs,2.5-D integration,HSPICE simulation,IEEE 1149.1 standard,ModelSim simulation,Si,fault detection,microbumps,post-bond silicon interposer interconnects,scan-based testing,test-access port controller,Clocks,Computer architecture,Delays,Integrated circuit interconnections,Silicon,Standar
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Scan-Based Testing of Post-Bond Silicon Interposer Interconnects in 2.5-D ICs
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| contributor author | Ran Wang | |
| contributor author | Chakrabarty, Krishnendu | |
| contributor author | Eklow, Bill | |
| date accessioned | 2020-03-13T00:18:58Z | |
| date available | 2020-03-13T00:18:58Z | |
| date issued | 2014 | |
| identifier issn | 0278-0070 | |
| identifier other | 6879596.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1142203?locale-attribute=en | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | Scan-Based Testing of Post-Bond Silicon Interposer Interconnects in 2.5-D ICs | |
| type | Journal Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8324705 | |
| subject keywords | boundary scan testing | |
| subject keywords | circuit simulation | |
| subject keywords | elemental semiconductors | |
| subject keywords | fault diagnosis | |
| subject keywords | integrated circuit interconnections | |
| subject keywords | integrated circuit modelling | |
| subject keywords | integrated circuit testing | |
| subject keywords | silicon | |
| subject keywords | 2.5-D ICs | |
| subject keywords | 2.5-D integration | |
| subject keywords | HSPICE simulation | |
| subject keywords | IEEE 1149.1 standard | |
| subject keywords | ModelSim simulation | |
| subject keywords | Si | |
| subject keywords | fault detection | |
| subject keywords | microbumps | |
| subject keywords | post-bond silicon interposer interconnects | |
| subject keywords | scan-based testing | |
| subject keywords | test-access port controller | |
| subject keywords | Clocks | |
| subject keywords | Computer architecture | |
| subject keywords | Delays | |
| subject keywords | Integrated circuit interconnections | |
| subject keywords | Silicon | |
| subject keywords | Standar | |
| identifier doi | 10.1109/TCAD.2014.2331336 | |
| journal title | Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on | |
| journal volume | 33 | |
| journal issue | 9 | |
| filesize | 3461345 | |
| citations | 0 |