Modeling of Writing and Thinking Process in Handwriting by Digital Pen Analysis
contributor author | Ikegami, Kenshin | |
contributor author | Ohsawa, Yukio | |
date accessioned | 2020-03-12T22:45:32Z | |
date available | 2020-03-12T22:45:32Z | |
date issued | 2014 | |
identifier other | 7022630.pdf | |
identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1093549?show=full | |
format | general | |
language | English | |
publisher | IEEE | |
title | Modeling of Writing and Thinking Process in Handwriting by Digital Pen Analysis | |
type | Conference Paper | |
contenttype | Metadata Only | |
identifier padid | 8233003 | |
subject keywords | CMOS integrated circuits | |
subject keywords | n MOSFET | |
subject keywords | n circuit optimisation | |
subject keywords | n geometric programming | |
subject keywords | n low-power electronics | |
subject keywords | n FinFET devices | |
subject keywords | n FinFET transistor sizing | |
subject keywords | n ISCAS' | |
subject keywords | 85 benchmark circuits | |
subject keywords | n MOSFET | |
subject keywords | n bulk CMOS technology | |
subject keywords | n geometric programming | |
subject keywords | n performance optimization | |
subject keywords | n power consumption | |
subject keywords | n size 45 nm | |
subject keywords | n standard-cell library | |
subject keywords | n transistor sizing tool | |
subject keywords | n width quantization | |
subject keywords | n Computer architecture | |
subject keywords | n Delays | |
subject keywords | n FinFETs | |
subject keywords | n Libraries | |
subject keywords | n Logic gate | |
identifier doi | 10.1109/ISVLSI.2014.13 | |
journal title | ata Mining Workshop (ICDMW), 2014 IEEE International Conference on | |
filesize | 1470379 | |
citations | 0 |
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