System design of social insecurity analysis based on public involvement for management of public tranquility and order
ناشر:
سال
: 2014شناسه الکترونیک: 10.1109/ITHERM.2014.6892320
کلیدواژه(گان): circuit optimisation,n copper,n electronics packaging,n flip-chip devices,n integrated circuit interconnections,n integrated circuit reliability,n low-k dielectric thin films,n solders,n BEoL-fBEoL reliability,n Cu,n Cu-Low-k interconnects,n back-end-of-line,n bump footprint,n die attach process,n die attach reflow process,n die to substrate size ratio,n dielectric damage,n flip-chip attachment process,n flip-chip package,n mainstream elec
کالکشن
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آمار بازدید
System design of social insecurity analysis based on public involvement for management of public tranquility and order
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| contributor author | Handoyo, K.M. | |
| contributor author | Albarda | |
| contributor author | Ahmadi, A. | |
| date accessioned | 2020-03-12T22:31:20Z | |
| date available | 2020-03-12T22:31:20Z | |
| date issued | 2014 | |
| identifier other | 7013159.pdf | |
| identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1085821 | |
| format | general | |
| language | English | |
| publisher | IEEE | |
| title | System design of social insecurity analysis based on public involvement for management of public tranquility and order | |
| type | Conference Paper | |
| contenttype | Metadata Only | |
| identifier padid | 8223369 | |
| subject keywords | circuit optimisation | |
| subject keywords | n copper | |
| subject keywords | n electronics packaging | |
| subject keywords | n flip-chip devices | |
| subject keywords | n integrated circuit interconnections | |
| subject keywords | n integrated circuit reliability | |
| subject keywords | n low-k dielectric thin films | |
| subject keywords | n solders | |
| subject keywords | n BEoL-fBEoL reliability | |
| subject keywords | n Cu | |
| subject keywords | n Cu-Low-k interconnects | |
| subject keywords | n back-end-of-line | |
| subject keywords | n bump footprint | |
| subject keywords | n die attach process | |
| subject keywords | n die attach reflow process | |
| subject keywords | n die to substrate size ratio | |
| subject keywords | n dielectric damage | |
| subject keywords | n flip-chip attachment process | |
| subject keywords | n flip-chip package | |
| subject keywords | n mainstream elec | |
| identifier doi | 10.1109/ITHERM.2014.6892320 | |
| journal title | CT For Smart Society (ICISS), 2014 International Conference on | |
| filesize | 656514 | |
| citations | 0 |