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ناشر:
سال
: 2014
شناسه الکترونیک: 10.1109/PDP.2014.85
کلیدواژه(گان): clocks,n integrated circuit design,n network routing,n network theory (graphs),n network topology,n network-on-chip,n power aware computing,n NoC-based designs,n area reduction,n clock cycles,n logarithmic diameter topologies,n low latency network-on-chip-based applications,n low-latency NoC applications,n node communication,n optimal shortest-path routing algorithm,n power consumption reduction,n Complexity theory,n Computer architecture,n D
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