•  English
    • Persian
    • English
  •   Login
  • Ferdowsi University of Mashhad
  • |
  • Information Center and Central Library
    • Persian
    • English
  • Home
  • Source Types
    • Journal Paper
    • Ebook
    • Conference Paper
    • Standard
    • Protocol
    • Thesis
  • Use Help
View Item 
  •   FUM Digital Library
  • Fum
  • Articles
  • Latin Articles
  • View Item
  •   FUM Digital Library
  • Fum
  • Articles
  • Latin Articles
  • View Item
  • All Fields
  • Title
  • Author
  • Year
  • Publisher
  • Subject
  • Publication Title
  • ISSN
  • DOI
  • ISBN
Advanced Search
JavaScript is disabled for your browser. Some features of this site may not work without it.

The application of C5.0 in core-high-base expert system

Author:
Li, Qingfeng
,
Yang, Baozhu
Publisher:
IEEE
Year
: 2014
DOI: 10.1109/SPIN.2014.6776999
URI: http://libsearch.um.ac.ir:80/fum/handle/fum/1053426
Keyword(s): field programmable gate arrays,n hardware description languages,n logic design,n multiplying circuits,n signal processing,n 4x4 bit-serial multiplier simulation,n HDL based implementation,n N&,#x00D7,N bit-serial multiplier,n NxN bit-serial multiplication,n Virtex-4 ML402 FPGA board,n Xilinx ISE,n signal processing,n systematic design methodology,n word length 4 bit,n Adders,n Clocks,n Field programmable gate arrays,n Flip-flops,n Hardware
Collections :
  • Latin Articles
  • Show Full MetaData Hide Full MetaData
  • Statistics

    The application of C5.0 in core-high-base expert system

Show full item record

contributor authorLi, Qingfeng
contributor authorYang, Baozhu
date accessioned2020-03-12T21:34:43Z
date available2020-03-12T21:34:43Z
date issued2014
identifier other6947874.pdf
identifier urihttp://libsearch.um.ac.ir:80/fum/handle/fum/1053426
formatgeneral
languageEnglish
publisherIEEE
titleThe application of C5.0 in core-high-base expert system
typeConference Paper
contenttypeMetadata Only
identifier padid8183786
subject keywordsfield programmable gate arrays
subject keywordsn hardware description languages
subject keywordsn logic design
subject keywordsn multiplying circuits
subject keywordsn signal processing
subject keywordsn 4x4 bit-serial multiplier simulation
subject keywordsn HDL based implementation
subject keywordsn N&
subject keywords#x00D7
subject keywordsN bit-serial multiplier
subject keywordsn NxN bit-serial multiplication
subject keywordsn Virtex-4 ML402 FPGA board
subject keywordsn Xilinx ISE
subject keywordsn signal processing
subject keywordsn systematic design methodology
subject keywordsn word length 4 bit
subject keywordsn Adders
subject keywordsn Clocks
subject keywordsn Field programmable gate arrays
subject keywordsn Flip-flops
subject keywordsn Hardware
identifier doi10.1109/SPIN.2014.6776999
journal titlenformation Science, Electronics and Electrical Engineering (ISEEE), 2014 International Conference on
filesize105557
citations3
  • About Us
نرم افزار کتابخانه دیجیتال "دی اسپیس" فارسی شده توسط یابش برای کتابخانه های ایرانی | تماس با یابش
DSpace software copyright © 2019-2022  DuraSpace