FPGA architecture support for heterogeneous, relocatable partial bitstreams
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سال
: 2014شناسه الکترونیک: 10.1109/UCC.2014.122
کلیدواژه(گان): Computer architecture,IP networks,Load modeling,Prototypes,Routing protocols,Software,Network Function Description,Network Function Virtualization,VNF Configuration
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FPGA architecture support for heterogeneous, relocatable partial bitstreams
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contributor author | Huriaux, C. | |
contributor author | Sentieys, O. | |
contributor author | Tessier, R. | |
date accessioned | 2020-03-12T21:09:43Z | |
date available | 2020-03-12T21:09:43Z | |
date issued | 2014 | |
identifier other | 6927494.pdf | |
identifier uri | http://libsearch.um.ac.ir:80/fum/handle/fum/1039118 | |
format | general | |
language | English | |
publisher | IEEE | |
title | FPGA architecture support for heterogeneous, relocatable partial bitstreams | |
type | Conference Paper | |
contenttype | Metadata Only | |
identifier padid | 8165896 | |
subject keywords | Computer architecture | |
subject keywords | IP networks | |
subject keywords | Load modeling | |
subject keywords | Prototypes | |
subject keywords | Routing protocols | |
subject keywords | Software | |
subject keywords | Network Function Description | |
subject keywords | Network Function Virtualization | |
subject keywords | VNF Configuration | |
identifier doi | 10.1109/UCC.2014.122 | |
journal title | ield Programmable Logic and Applications (FPL), 2014 24th International Conference on | |
filesize | 209859 | |
citations | 0 |