Show simple item record

Low-power loop pipelining mapping onto CGRA utilizing variable dual V<inf>DD</inf>

contributor authorXu, Bing , Yin, Shouyi , Liu, Leibo , Wei, Shaojun
date accessioned2020-03-12T20:49:39Z
date available2020-03-12T20:49:39Z
date issued2014
identifier other6908397.pdf
identifier urihttp://libsearch.um.ac.ir:80/fum/handle/fum/1026925?show=full
formatgeneral
languageEnglish
publisherIEEE
titleLow-power loop pipelining mapping onto CGRA utilizing variable dual V<inf>DD</inf>
typeConference Paper
contenttypeMetadata Only
identifier padid8151997
subject keywordsForce
subject keywordsInverters
subject keywordsKinematics
subject keywordsPiezoelectric actuators
subject keywordsVectors
subject keywordsVibrations
subject keywordsCompliant mechanism
subject keywordsDesign
subject keywordsEnergetic Macroscopic Representation
subject keywordsForging
subject keywordsGraphical model
subject keywordsModelling
subject keywordsPiezoelectric actuator
identifier doi10.1109/ICELMACH.2014.6960220
journal titleircuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on
filesize1126912
citations0


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record