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Testing of small delay faults in a clock network

Type: Journal Paper

Author : Shao-Fu Yang; Shi-Yu Huang; Kun-Han Tsai; Wu-Tung Cheng

Year: 2016

Delay Characterization and Testing of Arbitrary Multiple-Pin Interconnects

Type: Journal Paper

Author : Shi-Yu Huang; Meng-Ting Tsai; Kun-Han Tsai; Wu-Tung Cheng

Year: 2016

Parametric Fault Testing and Performance Characterization of Post-Bond Interposer Wires in 2.5-D ICs

Type: Journal Paper

Author : Li-Ren Huang; Shi-Yu Huang; Kun-Han Tsai; Wu-Tung Cheng

Publisher: IEEE

Year: 2014

Pulse-Vanishing Test for Interposers Wires in 2.5-D IC

Type: Journal Paper

Author : Shi-Yu Huang; Jeo-Yen Lee; Kun-Han Tsai; Wu-Tung Cheng

Publisher: IEEE

Year: 2014

Author

Kun-Han Tsai (4)

Shi-Yu Huang (4)

Wu-Tung Cheng (4)

Jeo-Yen Lee (1)

Li-Ren Huang (1)

Meng-Ting Tsai (1)

Shao-Fu Yang (1)

Publisher

IEEE (2)

Year

2016 (2)

2014 (2)

Keywords

Circuit faults (2)

Delays (2)

integrated circuit testing (2)

2.5-D IC (1)

2.5D ICs (1)

2.5D stacked integrated circuit (1)

25-D stacked IC (1)

at speed test method (1)

at-speed test (1)

boundary scan testing (1)

Type

Journal Paper (4)

Language (ISO)

English (4)

Content Type

Fulltext (2)

Metadata Only (2)

Publication Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on (2)

2016 21th IEEE European Test Symposium (ETS) (1)

IEEE Design & Test (1)

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