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نمایش تعداد 1-10 از 23

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نوع: Journal Paper

نویسنده : Ji-Yong Um; Jae-Yoon Sim; Hong-June Park

سال: 2010

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An Approximate Closed-Form Channel Model for Diverse Interconnect Applications

نوع: Journal Paper

نویسنده : Minsoo Choi; Jae-Yoon Sim; Hong-June Park; Byungsub Kim

ناشر: IEEE

سال: 2014

All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface

نوع: Journal Paper

نویسنده : Kihwan Seong; Won-Cheol Lee; Byungsub Kim; Jae-Yoon Sim; Hong-June Park

سال: 2017

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A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratio

نوع: Conference Paper

نویسنده : Hye-Jung Kwon; Jae-seung Lee; Jae-Yoon Sim; Hong-June Park

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A 1.25 ps Resolution 8b Cyclic TDC in 0.13 m CMOS

نوع: Journal Paper

نویسنده : Young-Hun Seo; Jun-Seok Kim; Hong-June Park; Jae-Yoon Sim

ناشر: IEEE

سال: 2012

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Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current

نوع: Journal Paper

نویسنده : Hye-Jung Kwon; Jae-Seung Lee; Byungsub Kim; Jae-Yoon Sim; Hong-June Park

سال: 2014

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2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology

نوع: Journal Paper

نویسنده : Seungho Han; Sooeun Lee; Minsoo Choi; Jae-Yoon Sim; Hong-June Park; Byungsub Kim

سال: 2014

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An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL

نوع: Journal Paper

نویسنده : Kwang-Hee Choi,; Jung-Bum Shin,; Jae-Yoon Sim,; Hong-June Park,

سال: 2009

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A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface

نوع: Journal Paper

نویسنده : Seon-Kyoo Lee; Seung-Jin Park; Hong-June Park; Jae-Yoon Sim

سال: 2011

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A voltage-scalable 10-b pipelined ADC with current-mode amplifier

نوع: Conference Paper

نویسنده : Yunjae Suh; Seungnam Choi; Byungsub Kim; Hong-June Park; Jae-Yoon Sim

ناشر: IEEE

سال: 2014

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Untitled

An Approximate Closed-Form Channel Model for Diverse Interconnect Applications

All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface

A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratio

A 1.25 ps Resolution 8b Cyclic TDC in 0.13 m CMOS

Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current

2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology

An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL

A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface

A voltage-scalable 10-b pipelined ADC with current-mode amplifier

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Untitled

An Approximate Closed-Form Channel Model for Diverse Interconnect Applications

All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface

A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratio

A 1.25 ps Resolution 8b Cyclic TDC in 0.13 m CMOS

Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current

2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology

An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL

A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface

A voltage-scalable 10-b pipelined ADC with current-mode amplifier