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Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

Type: Journal Paper

Author : Camargo, Vinicius V. /A/.; Kaczer, Ben; Wirth, Glen; Grasser, Tibor; Groeseneken, Guido

Publisher: IEEE

Year: 2014

[IEEE MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference - Ajaccio, France (2008.05.5-2008.05.7)] MELECON 2008 - The 14th IEEE Mediterranean Electrotechnical Conference - Analytical model for a tunnel field-effect transistor

Type: Journal Paper

Author : Vandenberghe, William G.; Verhulst, Anne S.; Groeseneken, Guido; Soree, Bart; Magnus, Wim

Year: 2008

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Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor

Type: Journal Paper

Author : Verhulst, Anne S.; SoreÌ e, Bart; Leonelli, Daniele; Vandenberghe, William G.; Groeseneken, Guido

Year: 2010

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System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations

Type: Journal Paper

Author : Scholz, Matthias; Shih-Hung Chen; Thijs, Steven; Linten, D.; Hellings, Geert; Vandersteen, Gerd; Sawada, Masanori; Groeseneken, Guido

Publisher: IEEE

Year: 2014

Implications of BTI-Induced Time-Dependent Statistics on Yield Estimation of Digital Circuits

Type: Journal Paper

Author : Weckx, Pieter; Kaczer, Ben; Toledano-Luque, Maria; Raghavan, Praveen; Franco, Jacopo; Roussel, P.J.; Groeseneken, Guido; Catthoor, Francky

Publisher: IEEE

Year: 2014

Endurance of One Transistor Floating Body RAM on UTBOX SOI

Type: Journal Paper

Author : Aoulaiche, Marc; Bravaix, A.; Simoen, Eddy; Caillat, Christian; Moonju Cho; Witters, L.; Blomme, P.; Fazan, P.; Groeseneken, Guido; Jurczak, Malgorzata

Publisher: IEEE

Year: 2014

Impact of the Substrate Orientation on CHC Reliability in n-FinFETs—Separation of the Various Contributions

Type: Journal Paper

Author : Tallarico, Andrea Natale; Moonju Cho; Franco, Jacopo; Ritzenthaler, R.; Togo, Mitsuhiro; Horiguchi, Naoto; Groeseneken, Guido; Crupi, Felice

Publisher: IEEE

Year: 2014

Performance Enhancement in Multi Gate Tunneling Field Effect Transistors by Scaling the Fin-Width

Type: Journal Paper

Author : Leonelli, Daniele; Vandooren, Anne; Rooyackers, Rita; Verhulst, Anne S.; Gendt, Stefan De; Heyns, Marc M.; Groeseneken, Guido

Year: 2010

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Local CDM ESD Protection Circuits for Cross-Power Domains in 3D IC Applications

Type: Journal Paper

Author : Shih-Hung Chen; Linten, D.; Scholz, Matthias; Yu-Ching Huang; Hellings, Geert; Boschke, Roman; Ming-Dou Ker; Groeseneken, Guido

Publisher: IEEE

Year: 2014

Development of a Technique for Characterizing Bias Temperature Instability-Induced Device-to-Device Variation at SRAM-Relevant Conditions

Type: Journal Paper

Author : Meng Duan; Jian Fu Zhang; Zhigang Ji; Wei Dong Zhang; Kaczer, Ben; Schram, T.; Ritzenthaler, R.; Groeseneken, Guido; Asenov, Asen

Publisher: IEEE

Year: 2014

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Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

[IEEE MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference - Ajaccio, France (2008.05.5-2008.05.7)] MELECON 2008 - The 14th IEEE Mediterranean Electrotechnical Conference - Analytical model for a tunnel field-effect transistor

Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor

System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations

Implications of BTI-Induced Time-Dependent Statistics on Yield Estimation of Digital Circuits

Endurance of One Transistor Floating Body RAM on UTBOX SOI

Impact of the Substrate Orientation on CHC Reliability in n-FinFETs—Separation of the Various Contributions

Performance Enhancement in Multi Gate Tunneling Field Effect Transistors by Scaling the Fin-Width

Local CDM ESD Protection Circuits for Cross-Power Domains in 3D IC Applications

Development of a Technique for Characterizing Bias Temperature Instability-Induced Device-to-Device Variation at SRAM-Relevant Conditions

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Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits

[IEEE MELECON 2008 - 2008 IEEE Mediterranean Electrotechnical Conference - Ajaccio, France (2008.05.5-2008.05.7)] MELECON 2008 - The 14th IEEE Mediterranean Electrotechnical Conference - Analytical model for a tunnel field-effect transistor

Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor

System-Level ESD Protection Design Using On-Wafer Characterization and Transient Simulations

Implications of BTI-Induced Time-Dependent Statistics on Yield Estimation of Digital Circuits

Endurance of One Transistor Floating Body RAM on UTBOX SOI

Impact of the Substrate Orientation on CHC Reliability in n-FinFETs&#x2014;Separation of the Various Contributions

Performance Enhancement in Multi Gate Tunneling Field Effect Transistors by Scaling the Fin-Width

Local CDM ESD Protection Circuits for Cross-Power Domains in 3D IC Applications

Development of a Technique for Characterizing Bias Temperature Instability-Induced Device-to-Device Variation at SRAM-Relevant Conditions

Impact of the Substrate Orientation on CHC Reliability in n-FinFETs—Separation of the Various Contributions