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Now showing items 1-10 of 11

An all-digital phase-locked loop for high-speed clock generation

Type: Journal Paper

Author : Ching-Che Chung; Chen-Yi Lee

Year: 2003

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A new DLL-based approach for all-digital multiphase clock generation

Type: Journal Paper

Author : Ching-Che Chung; Chen-Yi Lee

Year: 2004

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A Sub-10- Digitally Controlled Oscillator Based on Hysteresis Delay Cell Topologies for WBAN Applications

Type: Journal Paper

Author : Shu-Yu Hsu; Jui-Yuan Yu; Chen-Yi Lee

Year: 2010

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A Low-Power and Portable Spread Spectrum Clock Generator for SoC Applications

Type: Journal Paper

Author : Duo Sheng; Ching-Che Chung; Chen-Yi Lee

Year: 2011

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A droplet-based microfluidic system capable of droplet formation and manipulation

Type: Journal Paper

Author : Chen-Yi Lee; Yen-Heng Lin; Gwo-Bin Lee

Publisher: Springer

Year: 2009

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Event-driven read-out circuits for energy-efficient sensor-SoC's

Type: Conference Paper

Author : Chen-Yi Lee , Lai, K.Y.-T. , Shu-Yu Hsu

Publisher: IEEE

Year: 2014

A Low-Power DCO Using Interlaced Hysteresis Delay Cells

Type: Journal Paper

Author : Chien-Ying Yu; Ching-Che Chung; Chia-Jung Yu; Chen-Yi Lee

Year: 2012

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Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture

Type: Journal Paper

Author : Jen-Wei Lee; Szu-Chi Chung; Hsie-Chia Chang; Chen-Yi Lee

Publisher: IEEE

Year: 2014

A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems

Type: Journal Paper

Author : Yi-Min Lin; Chih-Hsiang Hsu; Hsie-Chia Chang; Chen-Yi Lee

Publisher: IEEE

Year: 2014

A 48.6-to-105.2 µW Machine Learning Assisted Cardiac Sensor SoC for Mobile Healthcare Applications

Type: Journal Paper

Author : Shu-Yu Hsu; Yingchieh Ho; Po-Yao Chang; ChauChin Su; Chen-Yi Lee

Publisher: IEEE

Year: 2014

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An all-digital phase-locked loop for high-speed clock generation

A new DLL-based approach for all-digital multiphase clock generation

A Sub-10- Digitally Controlled Oscillator Based on Hysteresis Delay Cell Topologies for WBAN Applications

A Low-Power and Portable Spread Spectrum Clock Generator for SoC Applications

A droplet-based microfluidic system capable of droplet formation and manipulation

Event-driven read-out circuits for energy-efficient sensor-SoC's

A Low-Power DCO Using Interlaced Hysteresis Delay Cells

Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture

A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems

A 48.6-to-105.2 µW Machine Learning Assisted Cardiac Sensor SoC for Mobile Healthcare Applications

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An all-digital phase-locked loop for high-speed clock generation

A new DLL-based approach for all-digital multiphase clock generation

A Sub-10- Digitally Controlled Oscillator Based on Hysteresis Delay Cell Topologies for WBAN Applications

A Low-Power and Portable Spread Spectrum Clock Generator for SoC Applications

A droplet-based microfluidic system capable of droplet formation and manipulation

Event-driven read-out circuits for energy-efficient sensor-SoC's

A Low-Power DCO Using Interlaced Hysteresis Delay Cells

Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture

A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems

A 48.6-to-105.2 &#x00B5;W Machine Learning Assisted Cardiac Sensor SoC for Mobile Healthcare Applications

A 48.6-to-105.2 µW Machine Learning Assisted Cardiac Sensor SoC for Mobile Healthcare Applications