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Circuit mismatch influence on performance of paralleling silicon carbide MOSFETs

نوع: Conference Paper

ناشر: IEEE

سال: 2014

Towards nano-computing blocks using room temperature double-gate single electron transistors

نوع: Conference Paper

نویسنده : Bounouar, M.A.; Drouin, D.; Calmon, F.

ناشر: IEEE

سال: 2014

Hierarchical sparse coded surface models

نوع: Conference Paper

نویسنده : Ruhnke, M. , Liefeng Bo , Fox, D. , Burgard, W.

ناشر: IEEE

سال: 2014

Influence of Fringe Field on Nano-Electromechanical (NEM) Memory Cells

نوع: Journal Paper

نویسنده : Boram Han; Ji Yong Song; Woo Young Choi

ناشر: IEEE

سال: 2014

Design of a Nanometric CMOS Memory Cell for Hardening to a Single Event With a Multiple-Node Upset

نوع: Journal Paper

ناشر: IEEE

سال: 2014

Partial Access Mode: New Method for Reducing Power Consumption of Dynamic Random Access Memory

نوع: Journal Paper

نویسنده : Riho, Yoshiro; Nakazato, Kazuo

ناشر: IEEE

سال: 2014

In-Se surface treatment of Cu-rich grown CuInSe<inf>2</inf>

نوع: Conference Paper

نویسنده : Bertram, T.; Depredurand, V.; Siebentritt, S.

ناشر: IEEE

سال: 2014

Simulation Study of the Trapping Properties of <inline-formula> <img src="/images/tex/21669.gif" alt="{\\rm HfO}_{2}"> </inline-formula>-Based Charge-Trap Memory Cells

نوع: Journal Paper

نویسنده : Driussi, Francesco; Spiga, Silvia; Lamperti, Alessio; Congedo, G.; Gambi, Alessio

ناشر: IEEE

سال: 2014

Coding for Unreliable Flash Memory Cells

نوع: Journal Paper

نویسنده : Gabrys, Ryan; Sala, Frederic; Dolecek, Lara

ناشر: IEEE

سال: 2014

A Comparitive Study of Predictive Models for Cloud Infrastructure Management

نوع: Conference Paper

نویسنده : Balaji, M. , Rao, G.S.V. , Kumar, C.A.

ناشر: IEEE

سال: 2014

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Circuit mismatch influence on performance of paralleling silicon carbide MOSFETs

Towards nano-computing blocks using room temperature double-gate single electron transistors

Hierarchical sparse coded surface models

Influence of Fringe Field on Nano-Electromechanical (NEM) Memory Cells

Design of a Nanometric CMOS Memory Cell for Hardening to a Single Event With a Multiple-Node Upset

Partial Access Mode: New Method for Reducing Power Consumption of Dynamic Random Access Memory

In-Se surface treatment of Cu-rich grown CuInSe<inf>2</inf>

Simulation Study of the Trapping Properties of <inline-formula> <img src="/images/tex/21669.gif" alt="{\\rm HfO}_{2}"> </inline-formula>-Based Charge-Trap Memory Cells

Coding for Unreliable Flash Memory Cells

A Comparitive Study of Predictive Models for Cloud Infrastructure Management

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Circuit mismatch influence on performance of paralleling silicon carbide MOSFETs

Towards nano-computing blocks using room temperature double-gate single electron transistors

Hierarchical sparse coded surface models

Influence of Fringe Field on Nano-Electromechanical (NEM) Memory Cells

Design of a Nanometric CMOS Memory Cell for Hardening to a Single Event With a Multiple-Node Upset

Partial Access Mode: New Method for Reducing Power Consumption of Dynamic Random Access Memory

In-Se surface treatment of Cu-rich grown CuInSe<inf>2</inf>

Simulation Study of the Trapping Properties of <inline-formula> <img src="/images/tex/21669.gif" alt="{\\rm HfO}_{2}"> </inline-formula>-Based Charge-Trap Memory Cells

Coding for Unreliable Flash Memory Cells

A Comparitive Study of Predictive Models for Cloud Infrastructure Management