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A 0.8V ΔΣ modulator using DTMOS technique
A 0.8V second order ∆Σ modulator is designed in 0.18µm bulk CMOS technology. Dynamic threshold MOSFET (DTMOS) technique is used to enhance the performance of the circuit building blocks at very low supply voltage. Schematic ...
1bit quantiser with rail to rail input range for sub-1 V ΔΣ modulators
A new, fully differential comparator with rail to rail input range is presented. This comparator can be used as a I-bit quantiser in sub-l V Delta-Sigma modulators. The guantisei is laid Out in 0.18 um CMOS technology. The post-layout simulation...
A 27 mV Output Ripple 92% Efficiency Buck Converter Using a Multi-Bit Delta-Sigma Modulator Controller and Segmented Output Switch in 180 nm CMOS
Abstract—In this paper, a DC-DC buck converter using a
multi-bit (two-bits) delta-sigma modulator to control segmented
output switches of the converter is proposed to enhance its
efficiency and improve its output ripple...
A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS
Two techniques to improve the performance of continuous-time delta–sigma (CTDS) modulators are presented. A digital calibration technique is introduced to enable the use of binary current digital-to-analog converters (DACs) ...
A Switching Buck Converter with Dual Loop Controller and Segmented Output Stage with Improved Start-up and Transient Response
In this paper, a method is presented to improve the
transient response of a buck converter. This method is based on
using dual-loop voltage-mode controller along with a segmented
power transistor stage. ...