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Rinaldo Castello and the Analog-Design Environment in Pavia: A Success Story

Type: Journal Paper

Author : Baccarani, G.

Publisher: IEEE

Year: 2014

TFET Inverters With n-/p-Devices on the Same Technology Platform for Low-Voltage/Low-Power Applications

Type: Journal Paper

Author : Baravelli, E.; Gnani, Elena; Gnudi, A.; Reggiani, S.; Baccarani, G.

Publisher: IEEE

Year: 2014

A quasi 2D semianalytical model for the potential profile in hetero and homojunction tunnel FETs

Type: Conference Paper

Author : Villani, F.; Gnani, E.; Gnudi, A.; Reggiani, S.; Baccarani, G.

Publisher: IEEE

Year: 2014

A new discretization strategy of the semiconductor equations comprising momentum and energy balance

Type: Journal Paper

Author : Forghieri, A.; Guerrieri, R.; Ciampolini, P.; Gnudi, A.; Rudan, M.; Baccarani, G.

Year: 1988

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Mode space approach for tight-binding transport simulations in graphene nanoribbon field-effect transistors including phonon scattering

Type: Journal Paper

Author : Grassi, R.; Gnudi, A.; Imperiale, I.; Gnani, E.; Reggiani, S.; Baccarani, G.

Publisher: American Institute of Physics

Year: 2013

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Exploiting Negative Differential Resistance in Monolayer Graphene FETs for High Voltage Gains

Type: Journal Paper

Author : Grassi, Roberto; Gnudi, A.; Di Lecce, Valerio; Gnani, Elena; Reggiani, S.; Baccarani, G.

Publisher: IEEE

Year: 2014

Dual-Metal-Gate InAs Tunnel FET With Enhanced Turn-On Steepness and High On-Current

Type: Journal Paper

Author : Beneventi, Giovanni Betti; Gnani, Elena; Gnudi, A.; Reggiani, S.; Baccarani, G.

Publisher: IEEE

Year: 2014

Impact of crystallographic orientation and impurity scattering in Graphene-Base Heterojunction Transistors for Terahertz Operation

Type: Conference Paper

Author : Di Lecce, V.; Grassi, R.; Gnudi, A.; Gnani, E.; Reggiani, S.; Baccarani, G.

Publisher: IEEE

Year: 2014

TCAD modeling of encapsulation layer in high-voltage, high-temperature operation regime

Type: Conference Paper

Author : Imperiale, I.; Reggiani, S.; Gnani, E.; Gnudi, A.; Baccarani, G.; Nguyen, L.; Denison, M.

Publisher: IEEE

Year: 2014

TCAD analysis of HCS degradation in LDMOS devices under AC stress conditions

Type: Conference Paper

Author : Monti, F.; Reggiani, S.; Barone, G.; Gnani, E.; Gnudi, A.; Baccarani, G.; Poli, S.; Chuang, M.-Y.; Tian, W.; Varghese, D.; Wise, R.

Publisher: IEEE

Year: 2014

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Rinaldo Castello and the Analog-Design Environment in Pavia: A Success Story

TFET Inverters With n-/p-Devices on the Same Technology Platform for Low-Voltage/Low-Power Applications

A quasi 2D semianalytical model for the potential profile in hetero and homojunction tunnel FETs

A new discretization strategy of the semiconductor equations comprising momentum and energy balance

Mode space approach for tight-binding transport simulations in graphene nanoribbon field-effect transistors including phonon scattering

Exploiting Negative Differential Resistance in Monolayer Graphene FETs for High Voltage Gains

Dual-Metal-Gate InAs Tunnel FET With Enhanced Turn-On Steepness and High On-Current

Impact of crystallographic orientation and impurity scattering in Graphene-Base Heterojunction Transistors for Terahertz Operation

TCAD modeling of encapsulation layer in high-voltage, high-temperature operation regime

TCAD analysis of HCS degradation in LDMOS devices under AC stress conditions

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Rinaldo Castello and the Analog-Design Environment in Pavia: A Success Story

TFET Inverters With n-/p-Devices on the Same Technology Platform for Low-Voltage/Low-Power Applications

A quasi 2D semianalytical model for the potential profile in hetero and homojunction tunnel FETs

A new discretization strategy of the semiconductor equations comprising momentum and energy balance

Mode space approach for tight-binding transport simulations in graphene nanoribbon field-effect transistors including phonon scattering

Exploiting Negative Differential Resistance in Monolayer Graphene FETs for High Voltage Gains

Dual-Metal-Gate InAs Tunnel FET With Enhanced Turn-On Steepness and High On-Current

Impact of crystallographic orientation and impurity scattering in Graphene-Base Heterojunction Transistors for Terahertz Operation

TCAD modeling of encapsulation layer in high-voltage, high-temperature operation regime

TCAD analysis of HCS degradation in LDMOS devices under AC stress conditions