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A Methodology for Optimized Design of Secure Differential Logic Gates for DPA Resistant Circuits

Type: Journal Paper

Author : Tena-Sanchez, Erica; Castro, Jose; Acosta, Antonio J.

Publisher: IEEE

Year: 2014

Design and test of a low-power 90nm XOR/XNOR gate for cryptographic applications

Type: Conference Paper

Author : Tena-Sanchez, Erica; Castro, Javier; Acosta, Antonio J.

Publisher: IEEE

Year: 2014

Author

Acosta, Antonio J. (2)

Tena-Sanchez, Erica (2)

Castro, Javier (1)

Castro, Jose (1)

Publisher

IEEE (2)

Year

2014 (2)

Keywords

AND-NAND gates (1)

CMOS integrated circuits (1)

complementary metal-oxide-semiconductor (1)

constant power dissipation (1)

cryptocircuits (1)

cryptography (1)

differential logic styles (1)

differential power analysis (1)

distributed processing (1)

DPA resistant circuits (1)

Type

Conference Paper (1)

Journal Paper (1)

Language (ISO)

English (2)

Content Type

Metadata Only (2)

Publication Title

Emerging and Selected Topics in Circuits and Systems, IEEE Journal on (1)

ower and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on (1)

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