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Proportionally-Fair Best Effort Flow Control in Network-on-Chip Architectures
Year: 2008
Abstract:
on Network-on-Chip
(NoC) in MP-SoC design is imminent to achieve high
performance potential. More importantly, many well
established schemes of networking and distributed
systems inspire NoC design methodologies. Employing...
Buffer Optimization in Network-on-Chip Through Flow Regulation
Year: 2010
Abstract:
For network-on-chip (NoC) designs, optimizing
buffers is an essential task since buffers are a major source of cost
and power consumption. This paper proposes flow regulation and
has defined a regulation spectrum as a means...
A single-stage DC/DC converter for LED automobile headlight
Publisher: IEEE
Year: 2014
An adaptable CMOS depressing synapse with detection of changes in input spike rate
Publisher: IEEE
Year: 2014
Design methodologies for 3D mixed signal integrated circuits: A practical 12-bit SAR ADC design case
Publisher: IEEE
Year: 2014